Managing power delivery at the system level now involves making a series of hierarchical trade-offs. For example, although 12V, 24V and 28V DC are well established in automotive, data-centre and aeronautical markets, large cloud-computing companies such as Google are experimenting with using 48V DC for bulk distribution. Their design architecture delivers 48V DC to the PoL regulators that directly serve large loads such as SoCs, while stepping it down to 12V to serve other needs. Google says its 48V approach has cut losses 16fold compared to 12V distribution.
Figure 1. Some designers are feeding 48V directly to PoL regulators in large systems such as data centres (Source: Intel FPGA)
There are reasons not to drive such high voltages so deep into the system architecture. A lot of infrastructure is already available to implement 12V distribution, such as silicon MOSFET switches and commodity regulators. On the other hand, single-stage 48V PoL regulators may need GaN switch transistors, which can be more expensive.
“It can come down to a question of capital expenditure versus operating expenditure,” said Mark Davidson, Intel PSG power division manager. “You may get more efficiency in really massive deployments with 48V PoLs, but stepping the high voltage down to 5 to 8V lets you use lower-cost PoLs.”
Distributing at lower voltage also gives ready access to specialist PoLs whose capabilities may be vital to meeting the complex needs of system-level chips.
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